C302 Project Status (07/29/2015 - 17:17:12) | |||
Project File: | c3000.xise | Parser Errors: | No Errors |
Module Name: | vga_video | Implementation State: | Programming File Not Generated |
Target Device: | xc3s400an-4fgg400 |
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Product Version: | ISE 14.7 |
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Design Goal: | Balanced |
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Design Strategy: | Xilinx Default (unlocked) |
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Environment: |
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Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | ||||||
Translation Report | ||||||
Map Report | ||||||
Place and Route Report | ||||||
CPLD Fitter Report (Text) | ||||||
Power Report | ||||||
Post-PAR Static Timing Report | ||||||
Bitgen Report |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
WebTalk Log File | Current | Wed Jul 29 17:17:22 2015 |